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R5F566TFCDFB Scheda tecnica(PDF) 91 Page - Renesas Technology Corp

Il numero della parte R5F566TFCDFB
Spiegazioni elettronici  Renesas MCUs
PDF  151 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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R5F566TFCDFB Scheda tecnica(HTML) 91 Page - Renesas Technology Corp

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R01DS0315EJ0130 Rev.1.30
Page 91 of 151
Oct 06, 2023
RX66T Group
2. Electrical Characteristics
2.4.3
Timing of Recovery from Low Power Consumption Modes
Note 1. The time for return after release from software standby is determined by the value obtained by adding the oscillation stabilization
waiting time (tSBYOSCWT) and the time required for operations by the software standby release sequencer (tSBYSEQ).
Note 2. When several oscillators were running before the transition to software standby, the greatest value of the oscillation stabilization
waiting time tSBYOSCWT is selected.
Note 3. For n, the greatest value is selected from among the internal clock division settings.
Note 4. This condition applies when fICLK : fFCLK = 1 : 1, 2 : 1, or 4 : 1.
Table 2.25
Timing of Recovery from Low Power Consumption Modes (1)
Conditions: VCC = 2.7 to 5.5 V, VCC_USB = 2.7 to 5.5 V, AVCC0 = AVCC1 = AVCC2 = 3.0 to 5.5V,
VSS = VSS_USB = AVSS0 = AVSS1 = AVSS2 = 0 V,
Ta = Topr
Item
Symbol Min. Typ.
Max.
Unit
Test
Conditions
tSBYOSCWT*2
tSBYSEQ*3
Recovery time
after
cancellation of
software
standby
mode*1
Crystal
resonator
connected to
main clock
oscillator
Main clock
oscillator
operating
tSBYMC
—
—
{(MSTS[7:0] bits ×
32) + 76} / 0.216
100 + 7 / fICLK +
2n / fMAIN
µs
Figure 2.12
Main clock
oscillator and
PLL circuit
operating
tSBYPC
{(MSTS[7:0] bits ×
32) + 138} / 0.216
100 + 7 / fICLK +
2n / fPLL
External clock
input to main
clock oscillator
Main clock
oscillator
operating
tSBYEX
352
100 + 7 / fICLK +
2n / fEXMAIN
Main clock
oscillator and
PLL circuit
operating
tSBYPE
639
100 + 7 / fICLK +
2n / fPLL
High-speed
on-chip
oscillator
operating
High-speed
on-chip
oscillator
operating
tSBYHO
454
100 + 7 / fICLK +
2n / fHOCO
High-speed
on-chip
oscillator
operating and
PLL circuit
operating
tSBYPH
741
100 + 7 / fICLK +
2n / fPLL
Low-speed on-chip oscillator
operating*4
tSBYLO
338
100 + 7 / fICLK +
2n / fLOCO



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