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R5F526TBAGFM Scheda tecnica(PDF) 19 Page - Renesas Technology Corp |
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R5F526TBAGFM Scheda tecnica(HTML) 19 Page - Renesas Technology Corp |
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19 / 142 page ![]() R01DS0407EJ0120 Rev.1.20 Page 19 of 142 Oct 31, 2024 RX26T Group 1. Overview 1.4 Pin Functions Table 1.4 lists the pin functions. Table 1.4 Pin Functions (1/5) Classifications Pin Name I/O Description Digital power supply VCC Input Power supply pin. Connect this pin to the system power supply. Connect the pin to VSS via a 0.1-µF multilayer ceramic capacitor. The capacitor should be placed close to the pin. VCL Input Connect this pin to VSS via a 0.47-µF smoothing capacitor used to stabilize the internal power supply. The capacitor should be placed close to the pin. VSS Input Ground pin. Connect it to the system power supply (0 V). Clock XTAL Output Pins for a crystal resonator. An external clock signal can be input through the EXTAL pin. EXTAL Input CAC CACREF Input Input pin for the clock frequency accuracy measurement circuit. Operating mode control MD Input Pins for setting the operating mode. The signal levels on these pins must not be changed during operation. System control RES# Input Reset pin. This MCU enters the reset state when this signal goes low. EMLE Input Input pin for the on-chip emulator enable signal. When the on- chip emulator is used, this pin should be driven high. When not used, it should be driven low. On-chip emulator FINED I/O FINE interface pin. TRST# Input Pins for the on-chip emulator. When the EMLE pin is driven high, these pins are dedicated for the on-chip emulator. TMS Input TDI Input TCK Input TDO Output Interrupt NMI Input Non-maskable interrupt request pin IRQ0 to IRQ15 Input Maskable interrupt request pins Multi-function timer pulse unit 3 MTIOC0A, MTIOC0B, MTIOC0C, MTIOC0D I/O The TGRA0 to TGRD0 input capture input/output compare output/PWM output pins MTIOC0A#, MTIOC0B#, MTIOC0C#, MTIOC0D# I/O The TGRA0 to TGRD0 input capture inverted input/output compare inverted output/PWM inverted output pins. MTIOC1A, MTIOC1B I/O The TGRA1 and TGRB1 input capture input/output compare output/PWM output pins. MTIOC1A#, MTIOC1B# I/O The TGRA1 and TGRB1 input capture inverted input/output compare inverted output/PWM inverted output pins. MTIOC2A, MTIOC2B I/O The TGRA2 and TGRB2 input capture input/output compare output/PWM output pins. MTIOC2A#, MTIOC2B# I/O The TGRA2 and TGRB2 input capture inverted input/output compare inverted output/PWM inverted output pins. MTIOC3A, MTIOC3B, MTIOC3C, MTIOC3D I/O The TGRA3 to TGRD3 input capture input/output compare output/PWM output pins. MTIOC3A#, MTIOC3B#, MTIOC3C#, MTIOC3D# I/O The TGRA3 to TGRD3 input capture inverted input/output compare inverted output/PWM inverted output pins. MTIOC4A, MTIOC4B, MTIOC4C, MTIOC4D I/O The TGRA4 to TGRD4 input capture input/output compare output/PWM output pins MTIOC4A#, MTIOC4B#, MTIOC4C#, MTIOC4D# I/O The TGRA4 to TGRD4 input capture inverted input/output compare inverted output/PWM inverted output pins. |
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