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R8C Scheda tecnica(PDF) 75 Page - Renesas Technology Corp

Il numero della parte R8C
Spiegazioni elettronici  RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  199 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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R8C Scheda tecnica(HTML) 75 Page - Renesas Technology Corp

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R8C/10 Group
Rev.1.20 Jan 27, 2006
page 65 of 180
REJ09B0019-0120
12.2 Timer Y
Timer Y is an 8-bit timer with an 8-bit prescaler and has two reload registers-Timer Y Primary and Timer
Y Secondary. Figure 12.11 shows a block diagram of Timer Y. Figures 12.12 to 12.14 show the TYZMR,
PREY, TYSC, TYPR, TYZOC, PUM, and YCSS registers.
The Timer Y has two operation modes as follows:
• Timer mode: The timer counts an internal count source.
• Programmable waveform generation mode: The timer outputs pulses of a given width successively.
Figure 12.11 Timer Y Block Diagram
Figure 12.12 TYZMR Register
Toggle
flip-flop
Timer Y interrupt
INT2 interrupt
TYPR register
f1
f8
Q
CK
fRING
TYSC register
TYOCNT=1
TYOPL=1
Q
TYOPL=0
P3_2 bit in P3 register
TYOCNT=0
TYMOD0=1
TYS=1
PREY register
INT2/CNTR1
TYCK1 to TYCK0
=002
=012
=102
=112
Counter
Reload register
Counter
Reload register
Peripheral data bus
Reload register
Polarity
switching
CLR
Write to TYZMR register
TYMOD0 bit=1
Timer Y, Z mode register
Symbol
Address
After reset
TYZMR
008016
0016
Bit name
Function
Bit symbol
b7 b6 b5 b4 b3 b2 b1 b0
0 0 : Timer mode
0 1 : Programmable waveform generation mode
1 0 : Programmable one-shot generation mode
1 1 : Programmable wait one-shot generation
mode
TZMOD1
TYS
TYWC
TYMOD0
TZMOD0
Timer Y operation
mode bit
Timer Y write
control bit
Function varies depending on the operation
mode
0 : Timer mode
1 : Programmable waveform generation mode
TZWC
TZS
0 : Stops counting
1 : Starts counting
0 : Stops counting
1 : Starts counting
Timer Z count
start flag
Timer Z operation
mode bit
b5 b4
Timer Y count
start flag
Timer Z write
control bit
Function varies depending on the operation
mode
RW
RW
RW
RW
RW
RW
RW
RW
RW
R1EDG
0 : Rising edge
1 : Falling edge
INT2/CNTR1 polarity
switching bit(1)
NOTES:
1. The IR bit in the INT2IC register may be set to “1” (interrupt requested) when the R1EDG bit is rewritten.
Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.
12.2 Timer (Timer Y)



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