R8C datasheet(78/199 Pages) RENESAS

78 / 199 page

R8C/10 Group

Rev.1.20 Jan 27, 2006

page 68 of 180

REJ09B0019-0120

12.2.1 Timer Mode

In this mode, the timer counts an internally generated count source (see “Table 12.7 Timer Mode

Specifications”). An external signal input to the CNTR1 pin can be counted. The TYSC register is

unused in timer mode. Figure 12.15 shows the TYZMR and PUM registers in timer mode.

Item

Specification

Count source

f1, f8, fRING, external signal fed to CNTR1 pin

Count operation

• Down-count

• When the timer underflows, it reloads the reload register contents before continuing

counting (When the Timer Y underflows, the contents of the Timer Y primary reload

Divide ratio

1/(n+1)(m+1)

n: set value in PREY register, m: set value in TYPR register

Count start condition

Write “1” (count start) to TYS bit in TYZMR register

Count stop condition

Write “0” (count stop) to TYS bit in TYZMR register

Interrupt request

• When Timer Y underflows [Timer Y interrupt]

generation timing

INT2/CNTR1 pin function

_______

Programmable I/O port, count source input or INT2 interrupt input

• When the TYCK1 to TYCK0 bits in the TCSS register are set to “00b”, “01b” or “10b”

_______

(Timer Y count source is f1, f8 or fRING), programmable I/O port or INT2 interrupt input

• When the TYCK1 to TYCK0 bits are set to “11b” (Timer Y count source is CNTR1

_______

input), count source input (INT2 interrupt input)

Read from timer

Count value can be read out by reading TYPR register.

Same applies to PREY register.

Write to timer(1)

Value written to TYPR register is written to both reload register and counter or written to

only reload register. Selected by program.

Same applies to PREY register.

Select function

• Event counter function

When setting TYCK1 to TYCK0 bits to “112”, an external signal fed to CNTR1 pin is

counted.

_______

• INT2/CNTR1 switching bit

Active edge of count source is selected by R1EDG bit.

NOTES:

1. The IR bit in the TYIC register is set to "1" (interrupt requested) if you write to the TYPR or PREY register while both

of the following conditions are met.

Conditions:

• TYWC bit in TYZMR register is "0" (write to reload register and counter simultaneously)

• TYS bit is "1" (count start)

To write to the TYPR or PREY register in the above state, disable interrupts before writing.

Table 12.7 Timer Mode Specifications

12.2 Timer (Timer Y)

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