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H8S2245 Scheda tecnica(PDF) 136 Page - Renesas Technology Corp |
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H8S2245 Scheda tecnica(HTML) 136 Page - Renesas Technology Corp |
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136 / 818 page ![]() Section 4 Exception Handling Rev.3.00 Mar. 26, 2007 Page 94 of 772 REJ09B0355-0300 4.1.3 Exception Sources and Vector Table The exception sources are classified as shown in figure 4.1. Different vector addresses are assigned to different exception sources. Table 4.2 lists the exception sources and their vector addresses. Exception sources Reset Interrupts Trap instruction Power-on reset Manual reset External interrupts: NMI, IRQ7 to IRQ0 Internal interrupts: 34 interrupt sources in on-chip supporting modules Figure 4.1 Exception Sources In modes 6 and 7, the on-chip ROM available for use on the H8S/2246 and H8S/2245 after a power-on reset is the 64-kbyte area comprising addresses H'000000 to H'00FFFF. Care is required when setting vector addresses. In this case, clearing the EAE bit in BCRL enables the 128-kbyte area comprising addresses H'000000 to H'01FFFF to be used for the on-chip ROM. |
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