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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S2245 Scheda tecnica(PDF) 191 Page - Renesas Technology Corp |
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H8S2245 Scheda tecnica(HTML) 191 Page - Renesas Technology Corp |
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191 / 818 page  Section 6 Bus Controller Rev.3.00 Mar. 26, 2007 Page 149 of 772 REJ09B0355-0300 6.3.5 Areas in Normal Mode In normal mode, a 64-kbyte address space comprising part of area 0 is controlled. Area partitioning is not performed in normal mode. In ROM-disabled expansion mode, the space excluding the on-chip RAM and internal I/O registers is external space. In ROM-enabled expansion mode the space excluding the on-chip ROM, on-chip RAM, and internal I/O registers is external space. The on-chip RAM is enabled when the RAME bit in the system control register (SYSCR) is set to 1; when the RAME bit is cleared to 0, the on-chip RAM is disabled and the corresponding addresses become external space. When external space is accessed, the CS0 signal can be output. In normal mode, the basic bus interface or burst ROM interface can be selected. |
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