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H8SX1663 Scheda tecnica(PDF) 329 Page - Renesas Technology Corp

Il numero della parte H8SX1663
Spiegazioni elettronici  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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H8SX1663 Scheda tecnica(HTML) 329 Page - Renesas Technology Corp

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Section 6 Bus Controller (BSC)
Rev.1.00 Jun. 07, 2006 Page 277 of 1102
REJ09B0294-0100
The time between the PALL or PRE command and the subsequent REF command can be changed
by wait cycle insertion. The number of wait cycles is selected from one to three cycles by bits
TPC1 and TPC0 in DRACCR. Set the bit according to the SDRAM to be used and the frequency
of this LSI so that the number of wait cycles can be optimal.
Figure 6.77 shows a timing example when the one wait cycles are inserted.
TR
p1
TR
p2
TR
r
TR
c1
TR
c2
CS
Precharge-sel
RAS
CAS
WE
CKE
PALL
REF
NOP
NOP
BS
RD/
WR
High
High
High
Address bus
SD
φ
Figure 6.77 Auto-Refresh Timing (TPC1 = 0, TPC0 = 1)



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