SH7101 datasheet(55/486 Pages) RENESAS

55 / 486 page

2. CPU

Rev.2.00 Sep. 27, 2007 Page 21 of 448

REJ09B0394-0200

Addressing

Mode

Instruction

Format

Effective Address Calculation

Equation

Indirect register

addressing with

displacement

@(disp:4,

Rn)

The effective address is the sum of Rn and a 4-bit

displacement (disp). The value of disp is zero-

extended, and remains unchanged for a byte

operation, is doubled for a word operation, and is

quadrupled for a longword operation.

Rn + disp

× 1/2/4

1/2/4

disp

(zero-extended)

Byte:

Rn + disp

Word:

Rn + disp

× 2

Longword:

Rn + disp

× 4

Indirect indexed

addressing

@(R0, Rn)

The effective address is the sum of Rn and R0.

Rn + R0

Indirect GBR

addressing with

displacement

@(disp:8,

GBR)

The effective address is the sum of GBR value and

an 8-bit displacement (disp). The value of disp is

zero-extended, and remains unchanged for a byte

operation, is doubled for a word operation, and is

quadrupled for a longword operation.

GBR

1/2/4

GBR

+ disp

× 1/2/4

disp

(zero-extended)

Byte:

GBR + disp

Word:

GBR + disp

Longword:

GBR + disp

Indirect indexed

GBR addressing

@(R0,

GBR)

The effective address is the sum of GBR value and

R0.

GBR

GBR + R0

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