SH7101 datasheet(13/486 Pages) RENESAS

13 / 486 page

Rev.2.00 Sep. 27, 2007 Page xiii of xxxiv

REJ09B0394-0200

Contents

Section 1 Overview............................................................................................... 1

1.1

Features .................................................................................................................................. 1

1.2

Internal Block Diagram..........................................................................................................3

1.3

Pin Arrangement .................................................................................................................... 4

1.4

Pin Functions ......................................................................................................................... 5

1.5

Differences from SH7046 Group ........................................................................................... 9

Section 2 CPU..................................................................................................... 11

2.1

Features ................................................................................................................................ 11

2.2

Register Configuration ......................................................................................................... 11

2.2.1

General Registers (Rn)............................................................................................ 13

2.2.2

Control Registers .................................................................................................... 13

2.2.3

System Registers ..................................................................................................... 14

2.2.4

Initial Values of Registers....................................................................................... 15

2.3

Data Formats ........................................................................................................................ 15

2.3.1

Data Format in Registers......................................................................................... 15

2.3.2

Data Formats in Memory ........................................................................................ 16

2.3.3

Immediate Data Format .......................................................................................... 16

2.4

Instruction Features.............................................................................................................. 17

2.4.1

RISC-Type Instruction Set...................................................................................... 17

2.4.2

Addressing Modes .................................................................................................. 20

2.4.3

Instruction Format................................................................................................... 24

2.5

Instruction Set ...................................................................................................................... 26

2.5.1

Instruction Set by Classification ............................................................................. 26

2.6

Processing States.................................................................................................................. 41

2.6.1

State Transitions...................................................................................................... 41

Section 3 MCU Operating Modes....................................................................... 43

3.1

Selection of Operating Modes.............................................................................................. 43

3.2

Input/Output Pins ................................................................................................................. 44

3.3

Explanation of Operating Modes ......................................................................................... 44

3.3.1

Mode 3 (Single chip mode)..................................................................................... 44

3.3.2

Clock Mode............................................................................................................. 44

3.4

Address Map ........................................................................................................................ 45

3.5

Initial State of This LSI........................................................................................................ 46

Section 4 Clock Pulse Generator ........................................................................ 47

4.1

Oscillator.............................................................................................................................. 47

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