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SH7101 Scheda tecnica(PDF) 21 Page - Renesas Technology Corp |
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SH7101 Scheda tecnica(HTML) 21 Page - Renesas Technology Corp |
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21 / 486 page ![]() Rev.2.00 Sep. 27, 2007 Page xxi of xxxiv REJ09B0394-0200 Section 16 RAM ............................................................................................... 385 16.1 Usage Note......................................................................................................................... 385 Section 17 Power-Down Modes ....................................................................... 387 17.1 Input/Output Pins ............................................................................................................... 389 17.2 Register Descriptions ......................................................................................................... 390 17.2.1 Standby Control Register (SBYCR) ..................................................................... 390 17.2.2 System Control Register (SYSCR) ....................................................................... 392 17.2.3 Module Standby Control Register 1 and 2 (MSTCR1 and MSTCR2).................. 393 17.3 Operation............................................................................................................................ 395 17.3.1 Sleep Mode ........................................................................................................... 395 17.3.2 Software Standby Mode........................................................................................ 396 17.3.3 Module Standby Mode.......................................................................................... 398 17.4 Usage Notes ....................................................................................................................... 399 17.4.1 I/O Port Status....................................................................................................... 399 17.4.2 Current Consumption during Oscillation Stabilization Wait Period ..................... 399 17.4.3 On-Chip Peripheral Module Interrupt................................................................... 399 17.4.4 Writing to MSTCR1 and MSTCR2 ...................................................................... 399 Section 18 List of Registers .............................................................................. 401 18.1 Register Addresses (Order of Address).............................................................................. 401 18.2 Register Bits....................................................................................................................... 408 18.3 Register States in Each Operating Mode............................................................................ 415 Section 19 Electrical Characteristics ................................................................ 421 19.1 Absolute Maximum Ratings .............................................................................................. 421 19.2 DC Characteristics ............................................................................................................. 422 19.3 AC Characteristics ............................................................................................................. 425 19.3.1 Test Conditions for the AC Characteristics........................................................... 425 19.3.2 Clock Timing ........................................................................................................ 426 19.3.3 Control Signal Timing .......................................................................................... 428 19.3.4 Multi-Function Timer Pulse Unit (MPU) Timing................................................. 431 19.3.5 I/O Port Timing..................................................................................................... 432 19.3.6 Watchdog Timer (WDT) Timing .......................................................................... 433 19.3.7 Serial Communication Interface (SCI) Timing ..................................................... 434 19.3.8 Output Enable (POE) Timing ............................................................................... 436 19.3.9 A/D Converter Timing .......................................................................................... 436 19.4 A/D Converter Characteristics ........................................................................................... 438 Appendix A Pin States ...................................................................................... 439 |
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