THMC50

REMOTE/LOCAL TEMPERATURE MONITOR AND

FAN CONTROLLER WITH SMBus INTERFACE

SLIS090 – JULY 1999

18

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

temperature measurement system (continued)

8-Bit A/D

Converter

REMOTE_DIODE+

Substrate

On-Chip Temperature

Sensor

GND

10

µA

90

µA

Control

State

Machine

Analog

MUX

Die

Substrate

REMOTE_DIODE–

Low-Pass

Filter

Remote

Temperature

Sensor

(CPU)

THMC50

Front End

Remote

VCC3AUX

Figure 14. THMC50 Temperature-to-Digital Converter Analog Front-End Block Diagram

temperature interrupts

There are two value RAM limits for the temperature reading that affect the interrupt behavior of the THMC50.

They are remote thermal diode high limit and remote thermal diode low limit.

temperature interrupt operation

Exceeding any of the value RAM thermal limits results in the INT output being asserted (if the corresponding

mask bits are not set) and respective status bit to be set. The INT output remains asserted until cleared by either

reading the interrupt status register, or setting the INT clear (bit 2) of the configuration register. Status bits are

cleared by reading the interrupt status register. The INT output can only be asserted again if the appropriate

high limit is reprogrammed. If the high limit is not reprogrammed, then the INT output is asserted again once

the temperature falls below the appropriate low limit. The INT output is now asserted again if the temperature

again rises above the appropriate high limit or falls below the appropriate low limit. See Figure 15 for an example.