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STM32W108CB Scheda tecnica(PDF) 160 Page - STMicroelectronics |
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STM32W108CB Scheda tecnica(HTML) 160 Page - STMicroelectronics |
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160 / 179 page ![]() Electrical characteristics STM32W108CB, STM32W108HB 160/179 Doc ID 16252 Rev 2 12.3.3 Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the JESD22-A114/C101 standard. Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: ● A supply overvoltage is applied to each power supply pin ● A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latch-up standard. Reset pulse width to guarantee a reset 26.0 µs Reset pulse width guaranteed not to cause a reset 0 1.0 µs Table 30. Reset filter specification for RSTB Parameter Min Typ Max Unit Table 31. ESD absolute maximum ratings Symbol Ratings Conditions Class Maximum value(1) 1. Based on characterization results, not tested in production. Unit VESD(HBM) Electrostatic discharge voltage (human body model) TA = +25 °C conforming to JESD22-A114 2 ±2000 V VESD(CDM) Electrostatic discharge voltage (charge device model) for non-RF pins TA = +25 °C conforming to JESD22-C101 II ±400 Electrostatic discharge voltage (charge device model)for RF pins ±225 MSL Moisture sensitivity level MSL3 Table 32. Electrical sensitivities Symbol Parameter Conditions Class LU Static latch-up class TA = +105 °C conforming to JESD78A II level A |
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