STM32W108CB datasheet(163/179 Pages) STMICROELECTRONICS

163 / 179 page

STM32W108CB, STM32W108HB

Electrical characteristics

Doc ID 16252 Rev 2

163/179

Note:

INL and DNL are referenced to a LSB of the Equivalent ADC Bits shown in the last row of

Table 37. ENOB (effective number of bits) can be calculated from either SNR (signal to non-

harmonic noise ratio) or SINAD (signal-to-noise and distortion ratio).

Table 38 describes the key ADC parameters measured at 25°C and VDD_PADS at 3.0 V, for

a sampling rate of 6 MHz. ADC_HVSELP and ADC_HVSELN are programmed to 0 to

disable the input buffer. The single-ended measurements were done at finput = 7.7% fNyquist;

0 dBFS level (where full-scale is a 1.2 V p-p swing). The differential measurements were

done at finput = 7.7% fNyquist; -6 dBFS level (where full-scale is a 2.4 V p-p swing).

DNL (codes peak)

0.04

0.03

0.04

0.09

0.12

0.1

DNL (codes RMS)

0.02

0.01

0.03

ENOB

(from single-cycle test)

5.5

7.0

7.5

10.0

11.5

12.0

12.5

SNR (dB)

Single-Ended

Differential

SINAD (dB)

Single-Ended

Differential

SDFR (dB)

Single-Ended

Differential

THD (dB)

Single-Ended

Differential

-55

-57

-63

-64

-67

-74

-69

-82

-69

-87

-69

-93

-69

-94

-69

-93

ENOB (from SNR)

Single-Ended

Differential

5.8

7.0

7.3

8.5

8.8

10.0

10.3

11.3

11.5

12.3

12.8

12.5

13.1

12.3

13.1

ENOB (from SINAD)

Single-Ended

Differential

5.8

7.0

7.3

8.3

8.8

9.8

10.1

11.3

11.0

12.3

11.1

12.8

11.3

13.1

11.1

13.0

Equivalent ADC Bits

[15:11]

[15:10]

[15:9]

[15:8]

[15:7]

[15:6]

[15:5]

[15:4]

Table 37.

ADC module key parameters for 1 MHz sampling (continued)

Parameter

Performance

Table 38.

ADC module key parameters for 6 MHz sampling

Parameter

Performance

ADC_PERIOD

Conversion Time (µs)

5.33

10.7

21.3

42.7

85.3

171

341

683

Nyquist Freq (kHz)

93.8

46.9

23.4

11.7

5.86

2.93

1.46

0.732

3 dB Cut-off (kHz)

56.5

28.3

14.1

7.07

3.53

1.77

0.883

0.442

INL (codes peak)

TBD

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