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MPC5125 Scheda tecnica(PDF) 73 Page - Freescale Semiconductor, Inc |
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MPC5125 Scheda tecnica(HTML) 73 Page - Freescale Semiconductor, Inc |
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73 / 92 page ![]() Electrical and Thermal Characteristics MPC5125 Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor 73 Figure 38. Timing Diagram — 8-,16-, 24-, and 32-bit CODEC/I2S Master Mode Table 40. Timing Specifications — 8-,16-, 24-, and 32-bit CODEC/I2S Slave Mode 1 NOTES: 1 Output timing is specified at a nominal 50 pF load. Sym Description Min Typ Max Units SpecID 1 Bit clock cycle time 40.0 — — ns A20.9 2 Clock duty cycle — 50 — %2 2 Bit clock cycle time. A20.10 3 Frame sync setup time 1.0 — — ns A20.11 4 Output data valid after clock edge — — 14.0 ns A20.12 5 Input data setup time 1.0 — — ns A20.13 6 Input data hold time 1.0 — — ns A20.14 BitClk 5 3 4 3 4 (CLKPOL=0) BitClk (CLKPOL=1) FrameSync (SyncPol= 1) TxD Output Output Output 6 7 8 Output FrameSync (SyncPol= 0) Output RxD Input 1 22 |
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