MPC8378E datasheet(9/128 Pages) FREESCALE

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MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

This figure shows the undershoot and overshoot voltages at the interfaces of the device.

Figure 2. Overshoot/Undershoot Voltage for GVDD/LVDD/OVDD/LBVDD

2.1.3

chip

Output Driver Characteristics

This table provides information on the characteristics of the output driver strengths. The values are

preliminary estimates.

Table 4. Output Drive Capability

Driver Type1

Output Impedance (

Ω)

Supply Voltage

Local bus interface utilities signals

LBVDD = 2.5 V, 3.3 V

LBVDD = 1.8 V

PCI signals

OVDD = 3.3 V

DDR1 signal

GVDD = 2.5 V

DDR2 signal

GVDD = 1.8 V

eTSEC 10/100/1000 signals

LVDD = 2.5 V, 3.3 V

DUART, system control, I2C, JTAG, SPI, and USB

OVDD = 3.3 V

GPIO signals

OVDD = 3.3 V

Note:

1. Specialized SerDes output capabilities are described in the relevant sections of these specifications (such as SGMII and

PCI Express)

GND

GND – 0.3 V

GND – 0.7 V

Not to Exceed 10%

G/L/O/LBVDD + 20%

G/L/O/LBVDD

G/L/O/LBVDD + 5%

of tinterface1

1. Note that tinterface refers to the clock period associated with the bus clock interface.

VIH

VIL

Note:

2. Note that with the PCI overshoot allowed (as specified above), the device does

not fully comply with the maximum AC ratings and device protection guideline outlined in

the

PCI Rev. 2.3 Specification (Section 4.2.2.3).

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