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MPC8378E Scheda tecnica(PDF) 18 Page - Freescale Semiconductor, Inc |
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MPC8378E Scheda tecnica(HTML) 18 Page - Freescale Semiconductor, Inc |
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18 / 128 page ![]() MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8 18 Freescale Semiconductor Table 16 provides the DDR capacitance when GVDD(typ) = 2.5 V. This table provides the current draw characteristics for MVREF. 6.2 DDR1 and DDR2 SDRAM AC Electrical Characteristics This section provides the AC electrical characteristics for the DDR SDRAM interface. 6.2.1 DDR1 and DDR2 SDRAM Input AC Timing Specifications This table provides the input AC timing specifications for the DDR2 SDRAM when GVDD(typ) = 1.8 V. This table provides the input AC timing specifications for the DDR1 SDRAM when GVDD(typ) = 2.5 V. Table 16. DDR SDRAM Capacitance for GVDD (typ) = 2.5 V Parameter Symbol Min Max Unit Note Input/output capacitance: DQ, DQS CIO 68 pF 1 Delta input/output capacitance: DQ, DQS CDIO —0.5 pF 1 Note: 1. This parameter is sampled. GVDD = 2.5 V ± 0.125 V, f = 1 MHz, TA = 25°C, VOUT =GVDD/2, VOUT (peak-to-peak) = 0.2 V. Table 17. Current Draw Characteristics for MVREF Parameter Symbol Min Typ Max Unit Note Current draw for MVREF DDR1 DDR2 IMVREF — — 250 150 600 400 μA1, 2 Note: 1. The voltage regulator for MVREF must be able to supply up to the stated maximum current. 2. This current is divided equally between MVREF1 and MVREF2, where half the current flows through each pin. Table 18. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface Parameter Symbol Min Max Unit AC input low voltage VIL —MVREF – 0.25 V AC input high voltage VIH MVREF + 0.25 — V Table 19. DDR1 SDRAM Input AC Timing Specifications for 2.5-V Interface Parameter Symbol Min Max Unit AC input low voltage VIL —MVREF – 0.31 V AC input high voltage VIH MVREF + 0.31 — V |
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