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MC68331TS Scheda tecnica(PDF) 36 Page - Freescale Semiconductor, Inc |
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MC68331TS Scheda tecnica(HTML) 36 Page - Freescale Semiconductor, Inc |
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36 / 84 page ![]() 36 MC68331TS/D The write to the port F data register is stored in the internal data latch, and if any port F pin is configured as an output, the value stored for that bit is driven onto the pin. A read of the port F data register returns the value at the pin only if the pin is configured as a discrete input. Otherwise, the value read is the value stored in the register. The port F data register is a single register that can be accessed in two locations. When accessed at $YFFA19, the register is referred to as PORTF0; when accessed at $YFFA1B, the register is referred to as PORTF1. The register can be read or written at any time. It is unaffected by reset. The bits in this register control the direction of the pin drivers when the pins are configured for I/O. Any bit in this register set to one configures the corresponding pin as an output. Any bit in this register cleared to zero configures the corresponding pin as an input. The bits in this register control the function of each port F pin. Any bit cleared to zero defines the corre- sponding pin to be an I/O pin. Any bit set to one defines the corresponding pin to be an interrupt request signal or MODCLK. The MODCLK signal has no function after reset. Data bus pin 9 controls the state of this register following reset. If DATA9 is set to one during reset, the register is set to $FF, which defines all port F pins as interrupt request inputs. If DATA9 is cleared to zero during reset, this register is set to $00, defining all port F pins as I/O pins. PORTF0, PORTF1 — Port F Data Register $YFFA19, $YFFA1B 15 8 7 6 5 4 3 2 1 0 NOT USED PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0 RESET: U U U U U U U U DDRF — Port F Data Direction Register $YFFA1D 15 8 7 6 5 4 3 2 1 0 NOT USED DDF7 DDF6 DDF5 DDF4 DDF3 DDF2 DDF1 DDF0 RESET: 0 0 0 0 0 0 0 0 PFPAR — Port F Pin Assignment Register $YFFA1F 15 8 7 6 5 4 3 2 1 0 NOT USED PFPA7 PFPA6 PFPA5 PFPA4 PFPA3 PFPA2 PFPA1 PFPA0 RESET: DATA9 DATA9 DATA9 DATA9 DATA9 DATA9 DATA9 DATA9 Table 17 Port F Pin Assignments PFPAR Field Port F Signal Alternate Signal PFPA7 PF7 IRQ7 PFPA6 PF6 IRQ6 PFPA5 PF5 IRQ5 PFPA4 PF4 IRQ4 PFPA3 PF3 IRQ3 PFPA2 PF2 IRQ2 PFPA1 PF1 IRQ1 PFPA0 PF0 MODCLK Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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