MC68331TS datasheet(10/84 Pages) FREESCALE

10 / 84 page

MC68331TS/D

NOTES:

1. DATA[15:0] are synchronized during reset only. MODCLK is synchronized only when used as an input port

pin.

2. EXTAL, XFC, and XTAL are clock reference connections.

3. PAI and PCLK can be used for discrete input, but are not part of an I/O port.

2.2 MCU Power Connections

2.3 MCU Driver Types

2.4 Signal Characteristics

RXD

—

SCK

I/O

PQS2

SIZ[1:0]

I/O

PE[7:6]

TSC

—

TXD

I/O

PQS7

XFC2

—

Special

—

XTAL2

—

Special

—

Table 3 MCU Power Connections

VDDSYN

Clock Synthesizer Power

VSSE/VDDE

External Periphery Power (Source and Drain)

VSSI/VDDI

Internal Module Power (Source and Drain)

Table 4 MCU Driver Types

Type

I/O

Description

Output-only signals that are always driven; no external pull-up required

Type A output with weak P-channel pull-up during reset

Three-state output that includes circuitry to pull up output before high impedance is es-

tablished, to ensure rapid rise time. An external holding resistor is required to

maintain logic level while the pin is in the high-impedance state.

Type B output that can be operated in an open-drain mode

Table 5 MCU Signal Characteristics

Signal Name

MCU Module

Signal Type

Active State

ADDR[23:0]

SIM

Bus

—

SIM

Output

AVEC

SIM

Input

BERR

SIM

Input

SIM

Output

BGACK

SIM

Input

BKPT

CPU32

Input

SIM

Input

CLKOUT

SIM

Output

—

CS[10:0]

SIM

Output

CSBOOT

SIM

Output

DATA[15:0]

SIM

Bus

—

SIM

Output

Table 2 MCU Pin Characteristics (Continued)

Mnemonic

Output

Driver

Input

Synchronized

Input

Hysteresis

Discrete

I/O

Port

Designation

Freescale Semiconductor, Inc.

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