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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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ADS1606IPAPR Scheda tecnica(PDF) 7 Page - Texas Instruments |
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ADS1606IPAPR Scheda tecnica(HTML) 7 Page - Texas Instruments |
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7 / 38 page  ADS1605 ADS1606 SBAS274H − MARCH 2003 − REVISED MAY 2007 www.ti.com 7 PIN ASSIGNMENTS TQFP PACKAGE (TOP VIEW) 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 FIFO_LEV[2] (ADS1606 Only) FIFO_LEV[1] (ADS1606 Only) FIFO_LEV[0] (ADS1606 Only) NC DOUT[15] DOUT[14] DOUT[13] DOUT[12] DOUT[11] DOUT[10] DOUT[9] DOUT[8] DOUT[7] DOUT[6] DOUT[5] DOUT[4] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 AGND AVDD AGND AINN AINP AGND AVDD RBIAS AGND AVDD AGND AVDD REFEN NC 2XMODE NC 64 63 62 61 60 59 58 57 56 55 54 17 18 19 20 21 22 23 24 25 26 27 53 52 51 50 49 28 29 30 31 32 AD S1605 AD S1606 Pow erPA D TM Terminal Functions TERMINAL NAME NO. TYPE DESCRIPTION AGND 1, 3, 6, 9, 11, 55, 57 Analog Analog ground AVDD 2, 7, 10, 12, 58 Analog Analog supply AINN 4 Analog input Negative analog input AINP 5 Analog input Positive analog input RBIAS 8 Analog Terminal for external analog bias setting resistor REFEN 13 Digital input: active low Internal reference enable. Internal pull-down resistor of 170k Ω to DGND. NC 14,16, 27, 28, 45, 50 Not connected These terminals are not connected within the ADS1605/6 and must be left unconnected. 2XMODE 15 Digital input Digital filter decimation rate. Internal pull-down resistor of 170k Ω to DGND. PD 17 Digital input: active low Power down all circuitry. Internal pull-up resistor of 170k Ω to DGND. DVDD 18, 26, 52 Digital Digital supply DGND 19, 25, 51, 54 Digital Digital ground RESET 20 Digital input: active low Reset digital filter CS 21 Digital input: active low Chip select RD 22 Digital input: active low Read enable OTR 23 Digital output Analog inputs out of range DRDY 24 Digital output: active low Data ready on falling edge DOUT [15:0] 29−44 Digital output Data output. DOUT[15] is the MSB and DOUT[0] is the LSB. FIFO_LEV[2:0] 46−48 Digital input FIFO level (for the ADS1606 only). FIFO_LEV[2] is MSB. NOTE: These terminals must be left disconnected on the ADS1605. IOVDD 53 Digital Digital I/O supply CLK 56 Digital input Clock input VCAP 59 Analog Terminal for external bypass capacitor connection to internal bias voltage VREFN 60, 61 Analog Negative reference voltage VMID 62 Analog Midpoint voltage VREFP 63, 64 Analog Positive reference voltage |
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