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R5F110PH Scheda tecnica(PDF) 54 Page - Renesas Technology Corp |
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R5F110PH Scheda tecnica(HTML) 54 Page - Renesas Technology Corp |
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54 / 153 page ![]() RL78/L1C 2. ELECTRICAL SPECIFICATIONS (A: TA = -40 to +85 °C) R01DS0192EJ0200 Rev. 2.00 Page 54 of 149 Feb 21, 2014 UART mode connection diagram (during communication at different potential) UART mode bit width (during communication at different potential) (reference) Remark 1. Rb[ ]: Communication line (TxDq) pull-up resistance, Cb[F]: Communication line (TxDq) load capacitance, Vb[V]: Communication line voltage Remark 2. q: UART number (q = 0 to 3), g: PIM and POM number (g = 0 to 3) Remark 3. fMCK: Serial array unit operation clock frequency (Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number, n: Channel number (mn = 00 to 03, 10 to 13)) TxDq RxDq User’s device Rx Tx Vb Rb RL78 microcontroller Baud rate error tolerance High-/Low-bit width 1/Transfer rate Baud rate error tolerance High-bit width Low-bit width 1/Transfer rate TxDq RxDq |
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