GMS81C2012 datasheet(59/107 Pages) HYNIX

59 / 107 page

HYUNDAI MicroElectronics

GMS81C2012/GMS81C2020

MAR. 2000 Ver 1.00

Example 1:

Timer0 = 16-bit timer mode, 0.5s at 4MHz

LDM

TM0,#0000_1111B;8uS

LDM

TM1,#0100_1100B;16bit Mode

LDM

TDR0,#<62500

;8uS X 62500

LDM

TDR1,#>62500

;=0.5s

SET1

T0E

Example 2:

Timer0 = 16-bit event counter mode

LDM

R0FUNC,#0000_0100B;EC0 Set

LDM

TM0,#0001_1111B;Counter Mode

LDM

TM1,#0100_1100B;16bit Mode

LDM

TDR0,#<0FFH

;

LDM

TDR1,#>0FFH

;

SET1

T0E

Example 3:

Timer0 = 16-bit capture mode

LDM

R0FUNC,#0000_0001B;INT0 set

LDM

TM0,#0010_1111B;Capture Mode

LDM

TM1,#0100_1100B;16bit Mode

LDM

TDR0,#<0FFH

;

LDM

TDR1,#>0FFH

;

LDM

IEDS,#01H;Falling Edge

SET1

T0E

12.6 PWM Mode

The GMS81C2020 has a high speed PWM (Pulse Width

Modulation) functions which shared with Timer1.

In PWM mode, pin R56/PWM1O/T1O outputs up to a 10-

bit resolution PWM output. This pin should be configured

as a PWM output by setting "1" bit PWM1O in R5FUNC.6

The period of the PWM output is determined by the

T1PPR (PWM1 Period Register) and PWM1HR[3:2]

(bit3,2 of PWM1 High Register) and the duty of the PWM

output is determined by the T1PDR (PWM1 Duty Regis-

ter) and PWM1HR[1:0] (bit1,0 of PWM1 High Register).

The user writes the lower 8-bit period value to the T1PPR

and the higher 2-bit period value to the PWM1HR[3:2].

An d writes d u t y v a lu e to th e T1 P D R an d th e

PWM1HR[1:0] same way.

The T1PDR is configured as a double buffering for glitch-

less PWM output. In Figure 12-12, the duty data is trans-

ferred from the master to the slave when the period data

matched to the counted value. (i.e. at the beginning of next

duty cycle)

PWM Period = [PWM1HR[3:2]T1PPR] X Source Clock

PWM Duty

= [PWM1HR[1:0]T1PDR] X Source Clock

The relation of frequency and resolution is in inverse pro-

portion. Table 12-2 shows the relation of PWM frequency

vs. resolution.

GMS81C2012 Scheda tecnica(PDF) 59 Page - Hynix Semiconductor

GMS81C2012 Scheda tecnica(HTML) 59 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL