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AN4671 Scheda tecnica(PDF) 7 Page - STMicroelectronics |
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AN4671 Scheda tecnica(HTML) 7 Page - STMicroelectronics |
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7 / 17 page ![]() AN4671 How to minimize switching losses DocID027654 Rev 1 7/17 Figure 5: Eoff at Rg=10 Ω, VDD=800 V, ID=20 A, VGS=-2 V to 20 V, Tj=25 °C These figures demonstrate that the largest turn-off losses occur during voltage rise time, which can be significantly shortened by lowering the gate resistance. Moreover, the small gate charge needed to switch the device and the low transconductance value: • eliminate the gate-source Miller plateau when Rg = 1 Ω (see Figure 4) • give a flat VGS for a period in the order of tens of nanoseconds when Rg = 10 Ω (see Figure 5) The use of a negative voltage to turn off the MOSFET helps reduce turn-off losses further since it increases the voltage drop across the gate resistance, thus enabling faster charge extraction from the gate. For any gate resistance value, the Eoff decreases by 35% to 40% when the off voltage moves from 0 V down to -5 V. |
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