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AN4671 Scheda tecnica(PDF) 3 Page - STMicroelectronics |
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AN4671 Scheda tecnica(HTML) 3 Page - STMicroelectronics |
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3 / 17 page ![]() AN4671 How to minimize conduction losses DocID027654 Rev 1 3/17 1 How to minimize conduction losses SiC MOSFETs require a higher gate voltage swing than standard super-junction MOSFETs or IGBTs. We recommend a +20 V positive bias gate drive to minimize RDS(on) and hence conduction losses. It is therefore evident that SiC MOSFETs offer clear advantages over other SiC devices in terms of: • DC current requirements – it does not require any gate current to sustain the conduction state • simplified driving circuits – only gate resistors and a simple 0 to 20 V input waveform are needed It is unnecessary and even undesirable to drive SiC MOSFETs with more than +20 V in the positive direction as the VGS absolute maximum rating is +25 V. It is possible to go as low as +18 V, but this increases the RDS(on) by about 25% at 20 A, 25 °C. The possibility of using a negative bias gate voltage to completely turn-off the device is treated in the following section dedicated to the switching loss minimization. Figure 1: SCT30N120 output characteristics (Tj = 25 °C) |
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