•

Registers CONFIG, OTCDAC, and FSOTCDAC are

refreshed from EEPROM.

•

Registers ODAC and FSODAC are refreshed from

the temperature indexed EEPROM locations.

Calibration Operation, Registers Updated by Serial

Communications

•

The MAX1452 has not had the Secure-Lock byte

set (CL[7:0] = 00hex) or UNLOCK is high.

•

Power is applied to the device.

•

The power-on reset functions have completed.

•

The registers can then be loaded from the serial

digital interface by use of serial commands. See the

section on Serial I/O and Commands.

Internal EEPROM

The internal EEPROM is organized as a 768 by 8-bit

memory. It is divided into 12 pages, with 64 bytes per

page. Each page can be individually erased. The mem-

ory structure is arranged as shown in Table 1. The look-

up tables for ODAC and FSODAC are also shown, with

the respective temp-index pointer. Note that the ODAC

table occupies a continuous segment, from address

000hex to address 15Fhex, whereas the FSODAC table

is divided in two parts, from 200hex to 2FFhex, and

from 1A0hex to 1FFhex. With the exception of the gen-

eral purpose user bytes, all values are 16-bit wide

words formed by two adjacent byte locations (high byte

and low byte).

The MAX1452 compensates for sensor offset, FSO, and

temperature errors by loading the internal calibration

registers with the compensation values. These com-

pensation values can be loaded to registers directly via

Low-Cost Precision Sensor

Signal Conditioner

10

______________________________________________________________________________________

MAX1452

+12V TO +40V

2N2222A

47

Ω

100k

Ω

4.99k

Ω

4.99M

Ω

1k

Ω

100

Ω

499k

Ω

100k

Ω

RSTC

RISRC

0.1

µF

0.1

µF

0.1

µF

0.1

µF

0.1

µF

INM

INP

7

9

16

1

2

13

14

15

8

3

BDR

5

6

4

FSOTC

ISRC

SENSOR

MAX6105

5VOUT

GND

1

D

S

G

3

Z1

IN

2N4392

2

OUT

AMPOUT

AMP-

AMP+

Figure 4. Basic 4–20mA Output, Loop-Powered Configuration