HT48R30A datasheet(9/43 Pages) HOLTEK

9 / 43 page

HT48R30A-1

Rev. 1.10

July 2, 2001

(INTC;0BH), Watchdog Timer option setting

PB;14H, PC;16H, PG;1EH) and I/O control

registers (PAC;13H, PBC;15H, PCC;17H,

PGC;1FH). The remaining space before the

20H is reserved for future expanded usage and

reading these locations will get "00H". The

general purpose data memory, addressed from

20H to 7FH, is used for data and control infor-

mation under instruction commands.

All of the data memory areas can handle arith-

metic, logic, increment, decrement and rotate

operations directly. Except for some dedicated

bits, each bit in the data memory can be set and

reset by "SET [m].i" and "CLR [m].i". They are

also indirectly accessible through memory

pointer registers (MP).

Indirect addressing register

Location 00H is indirect addressing register

that is not physically implemented. Any

read/write operation of [00H] will access data

memory pointed to by MP. Reading location

00H itself indirectly will return the result 00H.

Writing indirectly results in no operation.

The memory pointer register (MP) is 8-bit reg-

isters.

Accumulator

The accumulator is closely related to ALU oper-

ations. It is also mapped to location 05H of the

data memory and can carry out immediate data

operations. The data movement between two

data memory locations must pass through the

accumulator.

Arithmetic and logic unit - ALU

This circuit performs 8-bit arithmetic and logic

operations. The ALU provides the following func-

tions:

· Arithmetic operations (ADD, ADC, SUB,

SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

The ALU not only saves the results of a data op-

eration but also changes the status register.

G e ne r al P ur p o s e

DA T A M E M O R Y

( 96 B y t e s )

S pec i a l P u r pos e

DA T A M E M O R Y

00H

01H

02H

03H

04H

05H

06H

07H

08H

09H

0A H

0B H

0C H

0D H

0E H

0F H

10H

11H

12H

13H

14H

15H

16H

17H

18H

19H

1A H

1B H

1C H

1D H

1E H

1F H

7F H

: U nu s e d

R ead a s " 00"

80H

FF H

20H

I ndi r e c t A ddr es s i ng R egi s t er

AC C

PC L

TB L P

TB L H

WD T S

ST AT U S

IN T C

TM R

TM R C

PA C

PB C

PC C

PG C

RAM mapping

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