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HT48R30A Scheda tecnica(PDF) 20 Page - Holtek Semiconductor Inc |
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HT48R30A Scheda tecnica(HTML) 20 Page - Holtek Semiconductor Inc |
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20 / 43 page ![]() HT48R30A-1 Rev. 1.10 20 July 2, 2001 The PG0 is pin-shared with INT. In case of ²Internal RC+I/O² system oscillator, the PG1 and PG2 are pin-shared with OSC1 and OSC2 pins. Once the ²Internal RC+I/O² mode is selected, the PG1 and PG2 can be used as general purpose I/O lines. Otherwise, the pull-high resistors and I/O functions of PG1 and PG2 will be disabled. It is recommended that unused or not bonded out I/O lines should be set as output pins by software instruction to avoid consuming power under input floating state. Low voltage reset - LVR The microcontroller provides low voltage reset circuit in order to monitor the supply voltage of the device. If the supply voltage of the device is within the range 0.9V~VLVR, such as changing a battery, the LVR will automatically reset the device internally. The LVR includes the following specifications: · The low voltage (0.9V~VLVR) has to remain in their original state to exceed 1ms. If the low voltage state does not exceed 1ms, the LVR will ignore it and do not perform a reset func- tion. · The LVR uses the ²OR² function with the ex- ternal RES signal to perform chip reset. The relationship between VDD and VLVR is shown below. Note: VOPR is the voltage range for proper chip operation at 4MHz system clock. 5. 5V 3. 3V 3. 0V 0. 9V V DD V OP R V LV R 5. 5V V DD PA 0 ~ P A 7 PB 0 ~ P B 7 PC 0 ~ PC 5 PG 0 ~ P G 2 M U X M U X EX T E N ( P B0 , PB 1 O nl y ) OP 0 ~ OP 7 IN T fo r P G 0 O nl y S y s t em W ak e- up (P A o nl y ) R ead D a t a R egi s t er PB 0 EX T ( P B0 , PB 1 O nl y ) D Q CK Q S D Q CK Q S C o ntr o l B i t PU Da t a B u s W r i t e C o nt r ol R egi s t er C h i p R es et R ead C o nt r ol R eg i s t e r W r i t e D a t a R egi s t er Da t a B i t E X T = B Z f or P B 0 o nl y , E X T = B Z f o r P B 1 onl y , c on t r ol = P B 0 d at a r egi s t er P G 1/ P G 2 I / O m ode onl y Input/output ports |
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