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PC87382 Scheda tecnica(PDF) 69 Page - National Semiconductor (TI) |
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PC87382 Scheda tecnica(HTML) 69 Page - National Semiconductor (TI) |
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69 / 72 page ![]() 8.0 Device Characteristics (Continued) Revision 1.2 69 www.national.com 8.4.8 MIR and FIR Timing Figure 17. MIR and FIR Timing Symbol Parameter Conditions Min1 1. Not tested. Guaranteed by design. Max1 Unit tMPW MIR Signal Pulse Width Transmitter tMWN − 25 2 2. tMWN is the nominal pulse width for MIR mode. It is determined by the M_PWID field (bits 4-0) in the MIR_PW register at offset 01h in bank 6. tMWN + 25 nsec Receiver 60 nsec MDRT MIR Transmitter Data Rate Tolerance ± 0.1% tMJT MIR Receiver Edge Jitter, % of Nominal Bit Duration ± 2.9% tFPW FIR Signal Pulse Width Transmitter 120 130 nsec Receiver 90 160 nsec tFDPW FIR Signal Double Pulse Width Transmitter 245 255 nsec Receiver 215 285 nsec FDRT FIR Transmitter Data Rate Tolerance ± 0.01% tFJT FIR Receiver Edge Jitter, % of Nominal Bit Duration ± 4.0% tFPW Data MIR FIR Symbol tFDPW Chips tMPW |
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