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LAN9211 Scheda tecnica(PDF) 34 Page - SMSC Corporation |
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LAN9211 Scheda tecnica(HTML) 34 Page - SMSC Corporation |
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34 / 147 page  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Datasheet Revision 2.9 (03-01-12) 34 SMSC LAN9211 DATASHEET Data path operations for the various supported endianess and word swap configurations are illustrated in Figure 3.9. Table 3.8, "Endian Ordering Logic Operation" illustrates the byte ordering applied by the endian logic for each type of host access. This figure and table assume an internal byte ordering of 3- 2-1-0, where ‘3’ is the most significant byte (data[31:24]) and ‘0’ is the least significant byte (data[7:0]). Figure 3.8 LAN9211 Host Data Path Diagram "W ORD SW AP" Logic FIFO Port Endian O rdering Logic RX/TX Data FIFO Port Access (addresses 00h to 3Ch) Direct FIFO Access Endian O rdering Logic RX/TX Data FIFO Direct Access (FIFO _SEL = 1) CSRs and Status FIFO s FPO RTEND (HW _CFG [29]) FSELEND (HW _CFG [28]) D[15:0] (Host Data Bus) W O RD_SW AP |
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