| Motore di ricerca datesheet componenti elettronici |
|
HT48R10A Scheda tecnica(PDF) 6 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT48R10A Scheda tecnica(HTML) 6 Page - Holtek Semiconductor Inc |
|
6 / 42 page ![]() HT48R10A-1 Rev. 1.20 6 July 2, 2001 Functional Description Execution flow The system clock for the microcontroller is de- rived from either a crystal or an RC oscillator. The system clock is internally divided into four non-overlapping clocks. One instruction cycle consists of four system clock cycles. Instruction fetching and execution are pipelined in such a way that a fetch takes an in- struction cycle while decoding and execution takes the next instruction cycle. However, the pipelining scheme causes each instruction to ef- fectively execute in a cycle. If an instruction changes the program counter, two cycles are re- quired to complete the instruction. Program counter - PC The program counter (PC) controls the se- quence in which the instructions stored in pro- gram ROM are executed and its contents specify full range of program memory. After accessing a program memory word to fetch an instruction code, the contents of the program counter are incremented by one. The program counter then points to the memory word contain- ing the next instruction code. When executing a jump instruction, conditional skip execution, loading PCL register, subrou- tine call, or return from subroutine initial reset, internal interrupt, external interrupt or return from interrupt, the PC manipulates the pro- gram transfer by loading the address corre- sponding to each instruction. The conditional skip is activated by instruc- tions. Once the condition is met, the next in- struction, fetched during the current instruction execution, is discarded and a dummy cycle replaces it to get the proper in- struction. Otherwise proceed with the next in- struction. The lower byte of the program counter (PCL) is a readable and writable register (06H). Moving data into the PCL performs a short jump. The destination will be within the current program ROM page. When a control transfer takes place, an addi- tional dummy cycle is required. Program memory - ROM The program memory is used to store the pro- gram instructions which are to be executed. It also contains data, table, and interrupt entries, and is organized into 1024´14 bits, addressed by the program counter and table pointer. Certain locations in the program memory are reserved for special usage: · Location 000H This area is reserved for program initializa- tion. After chip reset, the program always be- gins execution at location 000H. · Location 004H This area is reserved for the external inter- rupt service program. If the INT input pin is activated, the interrupt is enabled and the stack is not full, the program begins execution at location 004H. T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T4 F e tc h IN S T ( P C ) E x ec ut e I N S T ( P C - 1 ) F e tc h IN S T ( P C + 1 ) E x ec ut e I N S T ( P C ) F e tc h IN S T ( P C + 2 ) E x ec ut e I N S T ( P C + 1 ) PC PC + 1 PC + 2 S yst e m C l o ck O S C2 ( RC o n l y ) PC Execution flow |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |