HT48R10A datasheet(17/42 Pages) HOLTEK

17 / 42 page

HT48R10A-1

Rev. 1.20

July 2, 2001

the timer/event counter preload register and

reading TMR gets the contents of the timer/event

counter. The TMRC is a timer/event counter con-

trol register, which defines some options.

The TM0, TM1 bits define the operating mode.

The event count mode is used to count external

events, which means the clock source comes from

an external (TMR) pin. The timer mode functions

as a normal timer with the clock source coming

from the fINT clock. The pulse width measurement

mode can be used to count the high or low level du-

ration of the external signal (TMR). The counting

is based on the fINT clock.

In the event count or timer mode, once the

timer/event counter starts counting, it will count

from the current contents in the timer/event

counter to FFH. Once overflow occurs, the coun-

ter is reloaded from the timer/event counter

preload register and generates the interrupt re-

quest flag (TF; bit 5 of INTC) at the same time.

In the pulse width measurement mode with

the TON and TE bits equal to one, once the

TMR has received a transient from low to high

(or high to low if the TE bits is "0") it will start

counting until the TMR returns to the original

level and resets the TON. The measured result

will remain in the timer/event counter even if

the activated transient occurs again. In other

words, only one cycle measurement can be

done. Until setting the TON, the cycle measure-

ment will function again as long as it receives

further transient pulse. Note that, in this oper-

ating mode, the timer/event counter starts

counting not according to the logic level but ac-

cording to the transient edges. In the case of

counter overflows, the counter is reloaded from

the timer/event counter preload register and is-

sues the interrupt request just like the other

two modes. To enable the counting operation,

the timer ON bit (TON; bit 4 of TMRC) should

be set to 1. In the pulse width measurement

mode, the TON will be cleared automatically af-

ter the measurement cycle is completed. But in

the other two modes the TON can only be reset

by instructions. The overflow of the timer/event

counter is one of the wake-up sources. No mat-

ter what the operation mode is, writing a 0 to

ETI can disable the interrupt service.

In the case of timer/event counter OFF condi-

tion, writing data to the timer/event counter

preload register will also reload that data to

the timer/event counter. But if the timer/event

counter is turned on, data written to it will only

be kept in the timer/event counter preload reg-

ister. The timer/event counter will still operate

until overflow occurs. When the timer/event

counter (reading TMR) is read, the clock will be

blocked to avoid errors. As clock blocking may re-

sults in a counting error, this must be taken into

consideration by the programmer.

The bit0~bit2 of the TMRC can be used to de-

fine the pre-scaling stages of the internal clock

sources of timer/event counter. The definitions

are as shown. The overflow signal of

timer/event counter can be used to generate

PFD signals for buzzer driving.

Input/output ports

There are 21 bidirectional input/output lines in

the microcontroller, labeled from PA to PC, which

are mapped to the data memory of [12H], [14H]

and [16H] respectively. All of these I/O ports can

be used for input and output operations. For in-

put operation, these ports are non-latching, that

is, the inputs must be ready at the T2 rising edge

of instruction "MOV A,[m]" (m=12H, 14H or

16H). For output operation, all the data is latched

and remains unchanged until the output latch is

rewritten.

Each I/O line has its own control register (PAC,

PBC, PCC) to control the input/output configu-

ration. With this control register, CMOS output

or Schmitt trigger input with or without

pull-high resistor structures can be reconfig-

ured dynamically (i.e. on-the-fly) under soft-

ware control. To function as an input, the

corresponding latch of the control register must

write "1". The input source also depends on the

control register. If the control register bit is "1",

the input will read the pad state. If the control

will move to the internal bus. The latter is pos-

sible in the "read-modify-write" instruction.

For output function, CMOS is the only configu-

ration. These control registers are mapped to

locations 13H, 15H and 17H.

After a chip reset, these input/output lines re-

main at high levels or floating state (dependent

HT48R10A Scheda tecnica(PDF) 17 Page - Holtek Semiconductor Inc

HT48R10A Scheda tecnica(HTML) 17 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

Scheda tecnica Scarica

Link URL