HT48R10A datasheet(22/42 Pages) HOLTEK

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Instruction Set Summary

Mnemonic

Description

Instruction

Cycle

Flag

Affected

Arithmetic

ADD A,[m]

ADDM A,[m]

ADD A,x

ADC A,[m]

ADCM A,[m]

SUB A,x

SUB A,[m]

SUBM A,[m]

SBC A,[m]

SBCM A,[m]

DAA [m]

Add data memory to ACC

Add ACC to data memory

Add immediate data to ACC

Add data memory to ACC with carry

Add ACC to register with carry

Subtract immediate data from ACC

Subtract data memory from ACC

Subtract data memory from ACC with result in data

memory

Subtract data memory from ACC with carry

Subtract data memory from ACC with carry and result

in data memory

Decimal adjust ACC for addition with result in data

memory

1(1)

Z,C,AC,OV

Logic Operation

AND A,[m]

OR A,[m]

XOR A,[m]

ANDM A,[m]

ORM A,[m]

XORM A,[m]

AND A,x

OR A,x

XOR A,x

CPL [m]

CPLA [m]

AND data memory to ACC

OR data memory to ACC

Exclusive-OR data memory to ACC

AND ACC to data memory

OR ACC to data memory

Exclusive-OR ACC to data memory

AND immediate data to ACC

OR immediate data to ACC

Exclusive-OR immediate data to ACC

Complement data memory

Complement data memory with result in ACC

1(1)

Increment & Decrement

INCA [m]

INC [m]

DECA [m]

DEC [m]

Increment data memory with result in ACC

Increment data memory

Decrement data memory with result in ACC

Decrement data memory

1(1)

HT48R10A-1

Rev. 1.20

July 2, 2001

HT48R10A Scheda tecnica(PDF) 22 Page - Holtek Semiconductor Inc

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