MB90437LPF datasheet(11/61 Pages) CYPRESS

11 / 61 page

MB90435 Series

DS07-13727-2E

(Continued)

Pin No.

Pin name

Circuit

type

Function

LQFP*2

QFP*1

P44

General I/O port. This function is enabled when UART1

disables the clock output.

SCK1

Serial clock pulse I/O pin for UART1. This function is

enabled when UART1 enables the serial clock output.

P45

General I/O port. This function is enabled when UART1

disables the serial data output.

SOT1

Serial data output pin for UART1. This function is enabled when

UART1 enables the serial data output.

P46

General I/O port. This function is enabled when the Extended

I/O serial interface disables the serial data output.

SOT2

Serial data output pin for the Extended I/O serial interface. This

function is enabled when the Extended I/O serial interface

enables the serial data output.

P47

General I/O port. This function is enabled when the Extended

I/O serial interface disables the clock output.

SCK2

Serial clock pulse I/O pin for the Extended I/O serial interface .

This function is enabled when the Extended I/O serial interface

enables the Serial clock output.

P50

General I/O port. This function is always enabled.

SIN2

Serial data input pin for the Extended I/O serial interface . Set

the corresponding Port Direction Register to input if this

function is used.

27 to 30

29 to 32

P51 to P54

General I/O port. This function is always enabled.

INT4 to INT7

External interrupt request input pins for INT4 to INT7. Set the

corresponding Port Direction Register to input if this function is

used.

P55

General I/O port. This function is always enabled.

ADTG

Trigger input pin for the A/D converter. Set the corresponding

Port Direction Register to input if this function is used.

36 to 39

38 to 41

P60 to P63

General I/O port. This function is enabled when the analog

input enable register specifies a port.

AN0 to AN3

Analog input pins for the 8/10-bit A/D converter. This function is

enabled when the analog input enable register specifies A/D.

41 to 44

43 to 46

P64 to P67

General I/O port. The function is enabled when the analog

input enable register specifies a port.

AN4 to AN7

Analog input pins for the 8/10-bit A/D converter. This function is

enabled when the analog input enable register specifies A/D.

P56

General I/O port. This function is always enabled.

TIN0

Event input pin for the 16-bit reload timers 0. Set the

corresponding Port Direction Register to input if this function is

used.

MB90437LPF Scheda tecnica(PDF) 11 Page - Cypress Semiconductor

MB90437LPF Scheda tecnica(HTML) 11 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

Scheda tecnica Scarica

Link URL