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ATS684LSN Scheda tecnica(PDF) 9 Page - Allegro MicroSystems

Il numero della parte ATS684LSN
Spiegazioni elettronici  Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC
PDF  16 Pages
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Produttore elettronici  ALLEGRO [Allegro MicroSystems]
Homepage  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

ATS684LSN Scheda tecnica(HTML) 9 Page - Allegro MicroSystems

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Two-Wire, Zero-Speed
Differential Gear Tooth Sensor IC
ATS684LSN
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Determining Output Signal Polarity
In Figure 2, the top panel, labeled Mechanical Position, repre-
sents the mechanical features of the target gear and orientation
to the device. The bottom panel, labeled Device Output Signal,
displays the square waveform corresponding to the digital output
signal (current amplitude) that results from a rotating gear config-
ured as shown in Figure 4. Referring to the target side nearest the
face of the sensor IC, the direction of rotation is: perpendicular to
the leads, across the face of the device, from the pin 1 side to the
pin 3 side.
To read the output signal as a voltage (VSENSE), a sense resistor
(RSENSE) can be placed on either the VCC signal or on the GND
signal. As shown in Figure 5, when RSENSE is placed on the GND
signal, the output signal voltage (VSENSE(LowSide)) is in phase
with ICC. When RSENSE is placed on the VCC signal, the output
signal voltage (VSENSE(HighSide)) is inverted relative to ICC.
Figure 4: Left-to-Right, Pin 1 to Pin 3 (top) and Right-to-
Left, Pin 3 to Pin 1 (bottom) Direction of Target
Rotation.
Figure 5: Alternative Polarity Conf igurations Using
Two-Wire Sensing.
The Output Polarity States table provides the permutations of output
voltage relative to ICC, given alternative locations for RSENSE. Panel A
shows the low-side (VSENSE(LowSide)) sensing configuration, and panel
B shows the high-side (VSENSE(HighSide)) configuration. As shown in
panel C, VSENSE(LowSide) is in phase with ICC, and VSENSE(HighSide), is
inverted.
V
DD
V
DD
I
CC
I
CC
11
VCC
VCC
ATS684
ATS684
GND
GND
33
R
LOAD
100
W
R
LOAD
100
W
C
LOAD
C
LOAD
Output Polarity States
RSENSE Location
ICC State
VSENSE State
High side
(VCC pin side)
High
Low
Low
High
Low side
(GND pin side)
High
High
Low
Low
I+
V+
V+
I
CC
V
SENSE(LowSide)
V
SENSE(HighSide)
Panel A
Panel B
Panel C



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