VT6516 datasheet(59/73 Pages) ETC

59 / 73 page

VIA Technologies, Inc.

Preliminary VT6516 Datarsheet

-59-

50H

CPU Soft Reset for the whole switch chip reset

For Read

0: soft reset in progress

1: soft reset done

For Write,

any value will trigger the whole chip reset

The soft reset is similar to power-on reset for the

switch chip, except that it is asserted by writing any

value to this register. The CPU soft reset has to take

16 RCLK50 cycles, i.e. 320ns, to make the switch

chip being reset and ready to CPU. For 8MHz 8051

CPU that an instruction cycle is 1.5

s, it needs to

wait for 4 CPU instruction cycles to continue after

the soft reset. Or, CPU can read this register

CPU_SOFT_RESET until value 1 is returned.

Note that reading this register will not cause the

address register to increment automatically. So,

consecutively reading from 2050H to 2051H should

not be applied. That is, any reading to 2051H has to

specify the address explicitly.

CPU_SOF

T_RESET

[0]

51H

Revision ID Register

This register is used to record the revision code. Its

value is 0 for the first sample ICs.

REVISIO

N_ID

[7:0] 0

R/O

4.9 Registers of MAC/IO Control Module

* Base Address: 2400H

Addres

(offset

)

Function

Name

Bits

Defau

Value

00H

configurable preamble bytes

This register specifies the preamble length (0..7

bytes) for outgoing packets.

PREAM_C

[2:0] 7

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