1. General Overview & Purpose:

️· Document Purpose: This is a section of the technical documentation detailing power sequencing, output driver characteristics, power consumption, and operational characteristics of the MPC8378E processor. It provides critical information for hardware engineers designing systems around this processor.
️· Target Audience: Hardware engineers, power engineers, and those involved in the design and implementation of systems using the MPC8378E.

2. Power Sequencing Requirements:

️· Core Voltage First: The core power supplies (VDD and AVDD) *must* be stable *before* the I/O power supplies (GVDD, LVDD, and OVDD) are applied. This prevents contention on I/O pins.
️· PORESET Assertion: PORESET signal should be asserted before the power supplies fully ramp up.
️· Voltage Levels: VDD and AVDD must reach 90% of their nominal values before the I/O voltages reach 10% of theirs.
️· Power Down Sequence: I/O power supplies must be deasserted before VDD and AVDD are deasserted.
️· SerDes Power: The SerDes power supply (L[1,2]_nV DD) should follow the same timing as the core supply (V DD).

3. Output Driver Characteristics:

️· Impedance Values: A table provides the output impedance values for different driver types (Local Bus, PCI, DDR, eTSEC, etc.) and associated supply voltages. This is important for signal integrity and termination.
️· Range: Output impedances vary based on signal type, supply voltage, and location.

4. Power Characteristics:

️· Power Consumption Estimates: A table lists typical power dissipation values for different core and DDR frequencies, at different temperatures. These values are approximate and depend on application and operating conditions.
️· Temperature Dependence: Power consumption increases significantly with temperature.
️· Sleep Power: Defined, but given a reference temperature.

5. Key Voltage Designations & Meanings:

️· VDD: Core Supply Voltage.
️· AVDD: PLL Supply Voltage (related to the processor core).
️· GVDD: I/O Voltage (likely related to DDR memory interfaces).
️· LVDD: I/O Voltage (likely for Ethernet interfaces).
️· OVDD: General I/O Voltage.
️· V IH/IL: Voltage High/Low input thresholds
️· PORESET: Power Reset Signal
️· L[1,2]_nV DD: SerDes Power Supply.
️· Tj: Junction Temperature.
️· Ta: Ambient Temperature.



Important Notes & Potential Concerns:

️· Preliminary Data: The document indicates that some data (like output driver characteristics) are preliminary, suggesting they might change in future revisions.
️· Application Dependence: Power consumption estimates are highly dependent on the specific application and operating conditions. Actual power usage may vary.
️· Signal Integrity: The output driver impedance values are crucial for ensuring signal integrity. Incorrect termination can lead to signal reflections and errors.
️· Complex Power Management: Implementing the required power sequencing correctly is critical for reliable operation and requires careful design.