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ST25DV64K Scheda tecnica(PDF) 193 Page - STMicroelectronics |
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ST25DV64K Scheda tecnica(HTML) 193 Page - STMicroelectronics |
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193 / 220 page ![]() DocID027603 Rev 4 193/220 ST25DV04K ST25DV16K ST25DV64K Bit representation and coding for fast commands 219 Appendix A Bit representation and coding for fast commands Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate, same subcarrier frequency or frequencies is/are used. In this case, the number of pulses is multiplied by 4 and all times increase by this factor. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2. A.1 Bit coding using one subcarrier A.1.1 High data rate For the fast commands, a logic 0 starts with four pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 9.44 µs, as shown in Figure 84. Figure 84. Logic 0, high data rate, fast commands For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by four pulses of 423.75 kHz (fC/32), as shown in Figure 85. Figure 85. Logic 1, high data rate, fast commands A.1.2 Low data rate For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 37.76 µs, as shown in Figure 86. Figure 86. Logic 0, low data rate, fast commands For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz (fC/32), as shown in Figure 87. |
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