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TLV9051, TLV9052, TLV9054

SBOS942F – AUGUST 2018 – REVISED JUNE 2019

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Product Folder Links: TLV9051 TLV9052 TLV9054

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Feature Description (continued)

The SHDN pins are high-impedance CMOS inputs. Dual op amp versions are independently controlled and quad

op amp versions are controlled in pairs with logic inputs. For battery-operated applications, this feature may be

used to greatly reduce the average current and extend battery life. The enable time is 10 µs for full shutdown of

all channels; disable time is 3 µs. When disabled, the output assumes a high-impedance state. This architecture

allows the TLV905xS to be operated as a gated amplifier (or to have the device output multiplexed onto a

common analog output bus). Shutdown time (tOFF) depends on loading conditions and increases as load

resistance increases. To ensure shutdown (disable) within a specific shutdown time, the specified 10-kΩ load to

midsupply (VS / 2) is required. If using the TLV905xS without a load, the resulting turnoff time is significantly

increased.

8.4 Device Functional Modes

The TLV905x family is operational when the power-supply voltage is between 1.8 V (±0.9 V) and 5.5 V (±2.75 V).

The TLV905xS devices feature a shutdown mode and are shutdown when a valid logic low is applied to the

shutdown pin.

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