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OrderableDevice Scheda tecnica(PDF) 12 Page - Texas Instruments

Il numero della parte OrderableDevice
Spiegazioni elettronici  TLV9051 / TLV9052 / TLV9054 5-MHz, 15-V/關s High Slew-Rate, RRIO Op Amp
PDF  76 Pages
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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OrderableDevice Scheda tecnica(HTML) 12 Page - Texas Instruments

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TLV9051, TLV9052, TLV9054
SBOS942F – AUGUST 2018 – REVISED JUNE 2019
www.ti.com
Product Folder Links: TLV9051 TLV9052 TLV9054
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Input pins are diode-clamped to the power-supply rails. Current limit input signals that can swing more than 0.5 V beyond the supply
rails to 10 mA or less.
(3)
Short-circuit to ground, one amplifier per package.
7 Specifications
7.1 Absolute Maximum Ratings
over operating junction temperature (unless otherwise noted)
(1)
MIN
MAX
UNIT
Supply voltage, VS = (V+) – (V–)
6
V
Signal input pins
Voltage(2)
Common-mode
(V–) – 0.5
(V+) + 0.5
V
Differential
VS + 0.2
V
Current(2)
–10
10
mA
Output short-circuit(3)
Continuous
Operating ambient temperature, TA
–40
150
°C
Junction temperature, TJ
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±4000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±1500
7.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
MAX
UNIT
VS
Supply voltage, VS = (V+) – (V–)
1.8
5.5
V
VIN
Input pin voltage
(V–) – 0.1
(V+) + 0.1
V
Specified temperature
–40
125
°C
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2)
This package option is for preview only.
7.4 Thermal Information for Single Channel
THERMAL METRIC(1)
TLV9051, TLV9051S
UNIT
DPW (X2SON)(2)
DBV (SOT-23)(2)
DCK
(SC70)(2)
DRL
(SOT553)(2)
5 PINS
5 PINS
6 PINS
5 PINS
5 PINS
RθJA
Junction-to-ambient thermal
resistance
470.0
228.1
210.8
231.2
TBD
°C/W
RθJC(top)
Junction-to-case(top) thermal
resistance
211.9
152.1
152.1
144.4
TBD
°C/W
RθJB
Junction-to-board thermal resistance
334.8
97.7
92.3
78.6
TBD
°C/W
ψJT
Junction-to-top characterization
parameter
29.8
74.1
76.2
51.3
TBD
°C/W
ψJB
Junction-to-board characterization
parameter
333.2
97.3
92.1
78.3
TBD
°C/W
RθJC(bot)
Junction-to-case(bottom) thermal
resistance
N/A
N/A
N/A
N/A
TBD
°C/W



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