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AX6800X Scheda tecnica(PDF) 47 Page - ASIX Electronics Corporation |
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AX6800X Scheda tecnica(HTML) 47 Page - ASIX Electronics Corporation |
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47 / 57 page ![]() 47 AX6800x 2/4-Port USB KVM Switch SoC Copyright © 2015 ASIX Electronics Corporation. All rights reserved. 4.5.3 High Speed UART The High Speed UART 1 data transmit and receive is via TXD1 and RXD1 pins. The complete data transmit/receive includes 1 start bit, 5~8 data bit, 1 parity bit (if supported parity check) and 1~2 stop bit. Software can set HS_DLLR, HS_DLHR and HS_DPR register to decide the baud rate. Please refer to HS_DLLR register description for baud rate setting. Figure 4-5: TXD1 and RXD1 Timing Diagram Note: 1. t0 is start bit time; t1 ~ t8 is data bit time; t9 is parity bit time; t10 is stop bit time. 2. t0 ~ t9 = 1/Baud Rate; t10 = 1 / baud rate (1 stop bit) t10 = 1.5 * (1 / baud rate) (1.5 stop bit) t10 = 2 * (1 / baud rate) (2 stop bit) 3. RXD1 baud rate tolerance +/- 3%. |
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