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LP87702 Scheda tecnica(PDF) 71 Page - Texas Instruments

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Il numero della parte LP87702
Spiegazioni elettronici  LP87702 Dual Buck Converter and 5-V Boost With Diagnostic Functions
PDF  98 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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LP87702 Scheda tecnica(HTML) 71 Page - Texas Instruments

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Figure 7-60. TOP_MASK_1 Register
7
6
5
4
3
2
1
0
I_MEAS_MASK
RESERVED
SYNC_CLK_M
ASK
RESERVED
TDIE_WARN_M
ASK
RESERVED
R/W-0h
R/W-0h
R/W-0h
R/W-0h
R/W-0h
R/W-0h
Table 7-52. TOP_MASK_1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
I_MEAS_MASK
R/W
0h
Masking for load current measurement ready interrupt I_MEAS_INT
in INT_TOP_1 register.
0 – Interrupt generated
1 – Interrupt not generated.
(Default from OTP memory)
6-4
RESERVED
R/W
0h
3
SYNC_CLK_MASK
R/W
0h
Masking for external clock detection interrupt SYNC_CLK_INT in
INT_TOP_1 register:
0 – Interrupt generated
1 – Interrupt not generated.
(Default from OTP memory)
2
RESERVED
R/W
0h
1
TDIE_WARN_MASK
R/W
0h
Masking for thermal warning interrupt TDIE_WARN_INT in
INT_TOP_1 register:
0 – Interrupt generated
1 – Interrupt not generated.
This bit does not affect TDIE_WARN_STAT status bit in
TOP_STATUS register.
(Default from OTP memory)
0
RESERVED
R/W
0h
7.6.1.1.43 TOP_MASK_2 Register (Offset = 2Ah) [reset = 1h]
TOP_MASK_2 is shown in Figure 7-61 and described in Table 7-53.
Return to Table 7-9.
Figure 7-61. TOP_MASK_2 Register
7
6
5
4
3
2
1
0
RESERVED
RESET_REG_
MASK
R/W-0h
R/W-1h
Table 7-53. TOP_MASK_2 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
R/W
0h
0
RESET_REG_MASK
R/W
1h
Masking for register reset interrupt RESET_REG_INT in INT_TOP_2
register:
0 – Interrupt generated
1 – Interrupt not generated.
(Default from OTP memory)
7.6.1.1.44 BUCK_MASK Register (Offset = 2Bh) [reset = 0h]
BUCK_MASK is shown in Figure 7-62 and described in Table 7-54.
Return to Table 7-9.
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LP87702
SNVSBU3 – MARCH 2021
Copyright © 2021 Texas Instruments Incorporated
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