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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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LP87702 Scheda tecnica(PDF) 22 Page - Texas Instruments |
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LP87702 Scheda tecnica(HTML) 22 Page - Texas Instruments |
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22 / 98 page  0.6V Enable Time Voltage Soft start Ramp BUCKx_SLEW_RATE[2:0] Resistive pull-down (if enabled) BUCKx_VSET[7:0] INT_BUCK(BUCKx_PG_INT) nINT BUCK_STATUS(BUCKx_PG_STAT) 0.35V Voltage decrease because of load BUCK_STATUS(BUCKx_STAT) BUCK_MASK(BUCKx_PGF_MASK) = 0 BUCK_MASK(BUCKx_PGR_MASK) = 0 Host clears interrupts Powergood interrupts 0 0 1 0 0 1 0 1 1 0 0 1 0 1 0 1 0 BUCKx_WINDOW[1:0] Figure 7-4. Buck Converter Enable and Disable Figure 7-5 shows how the boost converter is enabled by an ENx pin or by I2C write access. The soft-start circuit limits the in-rush current during start-up. The output voltage increase rate is less than 100 mV/μsec during soft start. If there is a short circuit at the output and the output voltage does not reach the input voltage level in 1 ms, the converter is disabled, and the interrupt is set. When the output voltage reaches the power-good threshold level, the BOOST_PG_INT interrupt flag in INT_BOOST register is set. Power-good thresholds are defined by BOOST_WINDOW bits. A PGOOD_WINDOW bit in PGOOD_CTRL register sets the detection method for the valid boost output voltage, either undervoltage detection or undervoltage and overvoltage detection. The power-good interrupt flag, when reaching valid output voltage, can be masked using BOOST_PGR_MASK bit in BOOST_MASK register. The power-good interrupt flag can also be generated when the output voltage becomes invalid. The interrupt mask for invalid output voltage detection is set by the BOOST_PGF_MASK bit in BOOST_MASK register. A BOOST_PG_STAT bit in the BOOST_STAT register always shows the validity of the output voltage; '1' means valid and '0' means invalid output voltage. The ENx input pins have integrated pulldown resistors. The pulldown resistors are enabled by default and host can disable those with ENx_PD bits in CONFIG register. LP87702 SNVSBU3 – MARCH 2021 www.ti.com 22 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP87702 |
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