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LP87702 Scheda tecnica(PDF) 28 Page - Texas Instruments

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Il numero della parte LP87702
Spiegazioni elettronici  LP87702 Dual Buck Converter and 5-V Boost With Diagnostic Functions
PDF  98 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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LP87702 Scheda tecnica(HTML) 28 Page - Texas Instruments

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Table 7-4. Watchdog Window Periods
CONTROL BIT
DEFAULT
VALUES
WD_LONG_OPEN_TIME
OTP
00 – 200 ms
01 – 600 ms
10 – 2000 ms
11 – 5000 ms
WD_CLOSE_TIME
OTP
00 – 10 ms
01 – 20 ms
10 – 50 ms
11 – 100 ms
7.3.9 Device Reset Scenarios
There are four reset methods implemented on the LP87702:
• Software reset with the SW_RESET bit in the RESET register
• NRST input signal low
• Undervoltage lockout (UVLO) reset from VANA supply
• Watchdog expiration (depending on the watchdog settings)
A SW reset occurs when the SW_RESET bit is set to 1. The bit is automatically cleared after writing. Figure
7-14shows how this event disables all the converters immediately, drives GPO signals low, resets all the register
bits to the default values and the OTP bits are loaded. I2C interface is not reset during a software reset. The host
must wait at least 1.2 ms after writing SW reset until making a new I2C read or write to the device.
If VANA supply voltage falls below the UVLO threshold level or the NRST signal is set low, then all the
converters are disabled immediately, the GPOx signals are driven low, and all the register bits are reset to the
default values. When the VANA supply voltage rises above the UVLO threshold level and the NRST signal rises
above the threshold level, the OTP bits are loaded to the registers and a start-up is initiated according to the
register settings. The host must wait at least 1.2 ms before reading or writing to the I2C interface.
Depending on the watchdog settings, the watchdog expiration can reset the device to the OTP default values.
7.3.10 Diagnostics and Protection Features
The LP87702 provides four levels of protection features:
• Input and output voltage information. Non-valid voltage sets interrupt or PGx signal:
– Validity of the output voltage of BUCK or BOOST converters
– Validity of VANA, VMON1, and VMON2 input voltages
• Warnings causing interrupt:
– Peak current limit detection in BUCK or BOOST converters
– Thermal warning
• Protection events which are disabling the converters:
– Short-circuit and overload protection for BUCK and BOOST converters
– Input overvoltage protection (VANAOVP)
– Watchdog expiration (optional, depends on the watchdog settings)
– Thermal shutdown
• Protection events which are causing the device to shutdown:
– Undervoltage lockout (VANAUVLO)
• Protections not causing interrupt or converter disable:
– Negative current limit detection in the BUCK or BOOST converters
7.3.10.1 Voltage Monitorings
The LP87702 device has programmable voltage monitoring for the BUCKx and BOOST converter output
voltages and for VANA, VMON1, and VMON2 inputs. Monitoring of each signal is independently enabled in
the PGOOD_CTRL register. Voltage monitoring can be under-voltage monitoring only (PGOOD_WINDOW =
0) or overvoltage and undervoltage monitoring (PGOOD_WINDOW = 1). This selection is common for all
LP87702
SNVSBU3 – MARCH 2021
www.ti.com
28
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