| Motore di ricerca datesheet componenti elettronici |
|
PIMXRT406LCFP4A Scheda tecnica(PDF) 9 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PIMXRT406LCFP4A Scheda tecnica(HTML) 9 Page - NXP Semiconductors |
|
9 / 100 page ![]() Modules list i.MX RT1020 Crossover Processors for Industrial Products, Rev. 2, 03/2021 NXP Semiconductors 9 3 Modules list The i.MX RT1020 processors contain a variety of digital and analog modules. Table 3 describes these modules in alphabetical order. Table 3. i.MX RT1020 modules list Block mnemonic Block name Subsystem Brief description ACMP1 ACMP2 ACMP3 ACMP4 Analog Comparator Analog The comparator (CMP) provides a circuit for comparing two analog input voltages. The comparator circuit is designed to operate across the full range of the supply voltage (rail-to-rail operation). ADC1 ADC2 Analog to Digital Converter Analog The ADC is a 12-bit general purpose analog to digital converter. AOI And-Or-Inverter Cross Trigger The AOI provides a universal boolean function generator using a four team sum of products expression with each product term containing true or complement values of the four selected inputs (A, B, C, D). Arm Arm Platform Arm The Arm Core Platform includes 1x Cortex-M7 core. It also includes associated sub-blocks, such as Nested Vectored Interrupt Controller (NVIC), Floating-Point Unit (FPU), Memory Protection Unit (MPU), and CoreSight debug modules. BEE Bus Encryption Engine Security On-The-Fly FlexSPI Flash Decryption CCM GPC SRC Clock Control Module, General Power Controller, System Reset Controller Clocks, Resets, and Power Control These modules are responsible for clock and reset distribution in the system, and also for the system power management. CSU Central Security Unit Security The Central Security Unit (CSU) is responsible for setting comprehensive security policy within the i.MX RT1020 platform. DAP Debug Access Port System Control Peripherals The DAP provides real-time access for the debugger without halting the core to: • System memory and peripheral registers • All debug configuration registers The DAP also provides debugger access to JTAG scan chains. The DAP module is internal to the Cortex-M7 Core Platform. DCDC DCDC Converter Analog The DCDC module is used for generating power supply for core logic. Main features are: • Adjustable high efficiency regulator • Supports 3.3 V input voltage • Supports nominal run and low power standby modes • Supports at 0.9 ~ 1.3 V output in run mode • Supports at 0.9 ~ 1.0 V output in standby mode • Over current and over voltage detection |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |