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PIMXRT406LCFP4A Scheda tecnica(PDF) 1 Page - NXP Semiconductors

Il numero della parte PIMXRT406LCFP4A
Spiegazioni elettronici  i.MX RT1020 Crossover Processors for Industrial Products
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMXRT1020IEC
Rev. 2, 03/2021
MIMXRT1021CAG4A
MIMXRT1021CAF4A
Package Information
Plastic Package
144-Pin LQFP, 20 x 20 mm, 0.5 mm pitch
100-Pin LQFP, 14 x 14 mm, 0.5 mm pitch
Ordering Information
See Table 2 on page 6
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.
© 2018-2021 NXP B.V.
1
i.MX RT1020 introduction
The i.MX RT1020 is a processor of i.MX RT family
featuring NXP’s advanced implementation of the Arm®
Cortex®-M7 core, which operates at speeds up to 396
MHz to provide high CPU performance and real-time
response.
The i.MX RT1020 processor has 256 KB on-chip RAM,
which can be flexibly configured as TCM or
general-purpose on-chip RAM. The i.MX RT1020
integrates advanced power management module with
DCDC and LDO that reduces complexity of external
power supply and simplifies power sequencing. The
i.MX RT1020 also provides various memory interfaces,
including SDRAM, RAW NAND FLASH, NOR
FLASH, SD/eMMC, Quad SPI, and a wide range of
connectivity interfaces including UART, SPI, I2C, USB,
and CAN; for connecting peripherals including WLAN,
Bluetooth™, and GPS. The i.MX RT1020 also has rich
audio features, including SPDIF and I2S audio interface.
Various analog IP integration, including ADC, analog
comparator, temperature sensor, etc.
i.MX RT1020 Crossover
Processors for Industrial
Products
1. i.MX RT1020 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6
2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1. Special signal considerations . . . . . . . . . . . . . . . 15
3.2. Recommended connections for unused analog
interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 17
4.2. System power and clocks . . . . . . . . . . . . . . . . . . 24
4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.5. External memory interface . . . . . . . . . . . . . . . . . 40
4.6. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.7. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.8. Communication interfaces . . . . . . . . . . . . . . . . . . 60
4.9. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 74
5.2. Boot device interface allocation . . . . . . . . . . . . . . 74
6. Package information and contact assignments . . . . . . . 80
6.1. 20 x 20 mm package information . . . . . . . . . . . . 80
6.2. 14 x 14 mm package information . . . . . . . . . . . . 89
7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96


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