ST25DV16KC-JF8D3 datasheet(71/203 Pages) STMICROELECTRONICS

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For writes in fast transfer mode buffer or Dynamic registers, internal programming is immediate at STOP

condition.

If byte write is inhibited, the device replies with NoAck. The bus master terminates the transfer by generating a

Stop condition and byte location not is modified (see Figure 33. Write mode sequences when write is inhibited).

Byte write is inhibited if byte complies with one of the following conditions:

•

Byte is in user memory and is write protected with LOCK_CCFILE register.

•

Byte is in user memory and is write protected with I2CSS register, and I2C security session is closed.

•

Byte is in user memory and fast transfer mode is activated.

•

Byte is in system memory and is a Read Only register.

•

Byte is in system memory and I2C security session is closed.

•

Byte is in fast transfer mode’s mailbox and is not the first Byte of mailbox.

•

Byte is in fast transfer mode’s mailbox and mailbox is busy.

•

Byte is in fast transfer mode’s mailbox and fast transfer mode is not activated.

•

Byte is in dynamic registers area and is a Read Only register.

6.4.2

I2C Sequential write

The I2C sequential write allows up to 256 bytes to be written in one command, provided they are all located in the

same user memory area and are all located in writable addresses.

After each byte is transferred, the internal byte address counter is incremented.

For each byte sent by the bus master:

•

If byte write is not inhibited, the device replies with Ack.

•

If byte write is inhibited, the device replies with NoAck.

The transfer is terminated by the bus master generating a Stop condition:

•

For writes in EEPROM (user memory or system configuration), if all bytes have been Ack'ed, internal

programming of all bytes starts after the stop condition, for a duration dependent on the number of bytes to

write (see below).

•

For writes in fast transfer mode buffer or Dynamic registers, if all bytes have been Ack'ed, internal

programming is done immediately after the stop condition.

•

If some bytes have been NotAck’ed, no internal programming is done (0 byte written).

Byte write is inhibited if byte complies with conditions described in Section 6.4.1 I2C Byte write, in addition:

•

Byte is in user memory but does not belong to same area than previous received byte (area border crossing

is forbidden).

•

256 write occurrence have already been reached in the same sequential write.

•

More than one byte is trying to be written in system area.

Seen from I2C, user memory is internally organized as rows of 16 bytes. Data located in the same row all share

the same most significant memory address bits b16-b14.

I2C sequential write programming time in the EEPROM memory is dependent on this internal organization: total

programming time is the I2C write time tW (as defined in Table 249. I2C DC characteristics up to 85 °C and

Table 250. I2C DC characteristics up to 125 °C) multiplied by the number of internal EEPROM pages where the

data must be programmed, including incomplete pages.

This means an I2C sequential write allows from 1 up to 16 bytes to be programmed in EEPROM in tW, provided

that they all share the same most significant memory address bits b16-b4.

For example, a successful I2C sequential write of 40 Bytes, starting at address 0010h, has a programming time

(starting after STOP condition) of 3 x tW. An I2C sequential write of 40 Bytes, starting at address 0008h, has a

programming time of 4 x tW.

ST25DV04KC ST25DV16KC ST25DV64KC

I²C Write operations

DS13519 - Rev 3

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