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DSP56004ROM Scheda tecnica(PDF) 49 Page - Freescale Semiconductor, Inc |
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DSP56004ROM Scheda tecnica(HTML) 49 Page - Freescale Semiconductor, Inc |
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49 / 82 page  Specifications Serial Host Interface (SHI) SPI Protocol Timing MOTOROLA DSP56004/D, Rev. 3 2-25 153 SCK Edge to Data Out Not Valid (Data Out Hold Time) master slave bypassed narrow wide bypassed narrow wide 0 57 163 0 57 163 0 57 163 0 57 163 — — — — — — 0 57 163 0 57 163 — — — — — — 0 57 163 0 57 163 — — — — — — ns ns ns ns ns ns 154 SS Assertion to Data Out Valid CPHA = 0 slave TC + TH + 35 — 65 — 58 — 53.5 ns 157 First SCK Sampling Edge to HREQ Output Deassertation slave bypassed narrow wide 3 × T C + TH + 32 3 × T C + TH + 209 3 × T C + TH + 507 — — — 102 279 577 — — — 85 262 560 — — — 75 252 550 ns ns ns 158 Last SCK Sampling Edge to HREQ Output Not Deasserted CPHA = 1 slave bypassed narrow wide 2 × T C + TH + 6 2 × T C + TH + 63 2 × T C + TH + 169 56 113 219 — — — 44 101 207 — — — 36.9 93.9 200 — — — ns ns ns 159 SS Deassertation to HREQ Output Not Deasserted CPHA = 0 slave 2 × T C + TH + 7 57 45 37.9 ns 160 SS Deassertation Pulse Width CPHA = 0 slave TC + 4 24 — 19 — 16.3 — ns 161 HREQ In Assertion to First SCK Edge master 0.5 × t SPICC+ 2 × T C + 6 106 — 82 — 67.7 — ns 162 HREQ In Deassertation to Last SCK Sampling Edge (HREQ In Set-up Time) CPHA = 1 master 0 0—0— 0 — ns Table 2-12 Serial Host Interface (SHI) SPI Protocol Timing (Continued) No. Characteristics Mode Filter Mode Expression 50 MHz 66 MHz 81 MHz Unit Min Max Min Max Min Max Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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