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DSP56004ROM Scheda tecnica(PDF) 19 Page - Freescale Semiconductor, Inc |
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DSP56004ROM Scheda tecnica(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 82 page ![]() Signal/Connection Descriptions Serial Audio Interface (SAI) MOTOROLA DSP56004/D, Rev. 3 1-13 SERIAL AUDIO INTERFACE (SAI) The SAI is composed of separate receiver and transmitter sections. SAI Receiver Section Table 1-9 Serial Audio Interface (SAI) Receiver signals Signal Name Signal Type State during Reset Signal Description SDI0 Input Tri-stated Serial Data Input 0 —While in the high impedance state, the internal input buffer is disconnected from the pin and no external pull-up is necessary. SDI0 is the serial data input for receiver 0. Note: This signal is high impedance during hardware or software reset, while receiver 0 is disabled (R0EN = 0), or while the DSP is in the Stop state. SDI1 Input Tri-stated Serial Data Input 1 —While in the high impedance state, the internal input buffer is disconnected from the pin and no external pull-up is necessary. SDI1 is the serial data input for receiver 1. Note: This signal is high impedance during hardware or software reset, while receiver 1 is disabled (R1EN = 0), or while the DSP is in the Stop state. SCKR Input or Output Tri-stated Receive Serial Clock —SCKR is an output if the receiver section is programmed as a master, and a Schmitt-trigger input if programmed as a slave. While in the high impedance state, the internal input buffer is disconnected from the pin and no external pull-up is necessary. Note: SCKR is high impedance if all receivers are disabled (individual reset) and during hardware or software reset, or while the DSP is in the Stop state. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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