AT43USB355 datasheet(41/115 Pages) ATMEL

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AT43USB355

2603G–USB–04/06

Timer/Counter0 Control Register – TCCR0

• Bits 7..3 – Res: Reserved Bits

These bits are reserved bits in the AT43USB355 and always read as zero.

• Bits 2, 1, 0 – CS02, CS01, CS00: Clock Select0, bit 2, 1 and 0

The Clock Select0 bits 2, 1 and 0 define the prescaling source of Timer/Counter0.

The Stop condition provides a Timer Enable/Disable function. The CK down divided modes

are scaled directly from the CK oscillator clock. If the external pin modes are used for

Timer/Counter0, transitions on PB0/(T0) will clock the counter even if the pin is configured as

an output. This feature can give the user SW control of the counting.

Timer/Counter0 – TCNT0

The Timer/Counter0 is realized as an up-counter with read and write access. If the

Timer/Counter0 is written and a clock source is present, the Timer/Counter0 continues count-

ing in the clock cycle following the write operation.

Bit

543

$33 ($53)

–

CS02

CS01

CS00

TCCR0

Read/Write

R/W

Initial Value

Table 11. Clock 0 Prescale Select

CS02

CS01

CS00

Description

Stop, the Timer/Counter0 is stopped

001

010

CK/8

011

CK/64

100

CK/256

101

CK/1024

External Pin T0, falling edge

External Pin T0, rising edge

Bit

$32 ($52)

MSB

–

LSB

TCNT0

Read/Write

R/W

Initial Value

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