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TMD3721 Scheda tecnica(PDF) 36 Page - OSRAM GmbH |
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TMD3721 Scheda tecnica(HTML) 36 Page - OSRAM GmbH |
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36 / 89 page  Datasheet, Public Page 35 [v3-00] 2023-May-26 Document Feedback TMD3721 − Register Overview PCFG2 Register (Address 0x90) Figure 42: PCFG2 Register REVID Register (Address 0x91) Figure 43: REVID Register ID Register (Address 0x92) Figure 44: ID Register Addr: 0x90 PCFG2 Bit Bit Name Default Access Bit Description 7:0 PPULSE_LENL 0x20 RW These bits are the 8 least significant bits of the 10-bit Pulse Length control setting. The upper 2 bits are in the PCFG1 register. See the PCFG1 register for details. Pulse Length needs to be greater than 16μs. Value Pulse Length 14 (0000001110) 16μs 15 (0000001111) 17μs Pulse Length = (PPULSE_LEN + 2)μs 1023 (1111111111) 1025μs Addr: 0x91 REVID Bit Bit Name Default Access Bit Description 7:5 Reserved 000 R Reserved 4:3 FUNC_ID 00 R Device function identification 2:0 REV_ID 001 R Device revision number Addr: 0x92 ID Bit Bit Name Default Access Bit Description 7:0 ID 0x82 R Device identification |
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