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SPSB100 Scheda tecnica(PDF) 51 Page - STMicroelectronics

Il numero della parte SPSB100
Spiegazioni elettronici  Automotive power management IC for highly integrated processors
PDF  213 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
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If the temperature of a cluster reaches the thermal warning threshold then a dedicated status flag (TW_CLx bit) is
set and an interrupt is issued.
If the temperature of a cluster reaches the thermal shutdown threshold then a dedicated status flag is set, the
outputs assigned to that cluster are shut down and depending on their configuration bit REGFAIL_GO_REC all
outputs are shut down or not as described in the Section 3.6.2.5: Regulator faults management.
Figure 29. Thermal cluster identification
Thermal Cluster 0
Thermal Cluster 1
Thermal Cluster 2
Thermal Cluster 3
Thermal Cluster 4
1
56
SGND
CSN
SDO
SDI
CLK
NRST
VIO
N.C.
VS
WU
OUT_HS
VREG
FIN1
NFSO1
FB1
LDO2
GBY
LDO1
FBB
FB2
IRQ
IGN
SWDBG
GND
GLOBAL
DLB
N.C.
N.C.
N.C.
Table 9. Thermal cluster definition
Th_CL0
Th_CL1
Th_CL2
Th_CL3
Th_CL4
LDO1, central
BUCK1
BUCK2
BUCK3
LDO2
TW digitally managed
TSDC analog managed
TW and TSD
Both digitally managed
TW and TSD
Both digitally managed
TW and TSD
Both digitally managed
TW and TSD
Both digitally managed
Clusters temperature is converted through the ADC and readable by SPI (through TEMP_CLx[9..0] bits), only in
active full-power mode
Note:
•
In the DEEP-SLEEP state all clusters are disabled.
•
In active low power all clusters are disabled except Th_CL0 to detect TSDC.
Monitoring of central thermal cluster is insured by analog comparator, while other thermal clusters are monitored
through the ADC.
Latent fault detection of TSDC thermal comparator is covered by Analog-BIST.
Latent fault detection of digital thermal monitor and ADC handler is covered by a Digital-BIST.
SPSB100
Protection, diagnosis and monitoring signals
DS14640 - Rev 2
page 51/213



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